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PRODID:-//Computer Science and Engineering - ECPv6.13.0//NONSGML v1.0//EN
CALSCALE:GREGORIAN
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X-WR-CALNAME:Computer Science and Engineering
X-ORIGINAL-URL:https://homecse.iitd.ac.in
X-WR-CALDESC:Events for Computer Science and Engineering
REFRESH-INTERVAL;VALUE=DURATION:PT1H
X-Robots-Tag:noindex
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BEGIN:VTIMEZONE
TZID:Asia/Kolkata
BEGIN:STANDARD
TZOFFSETFROM:+0530
TZOFFSETTO:+0530
TZNAME:IST
DTSTART:20250101T000000
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BEGIN:VEVENT
DTSTART;TZID=Asia/Kolkata:20250514T100000
DTEND;TZID=Asia/Kolkata:20250514T110000
DTSTAMP:20260924T034211
CREATED:20250512T144512Z
LAST-MODIFIED:20250512T144600Z
UID:1589-1747216800-1747220400@homecse.iitd.ac.in
SUMMARY:Synthesis and Arithmetic of Quantum Circuits
DESCRIPTION:Speaker: Amolak Kalra (https://sites.google.com/view/amolakratankalra/home) \nAbstract: Efficient decomposition of a unitary operator U using words from a universal gate set G is a fundamental problem in quantum computing. The process by which this is achieved is called circuit synthesis. This problem arises naturally in the context of quantum circuit\ncompilation. In this talk\, I will introduce this problem and explain how one can use tools from number theory to solve it. I will then explain some recent results that build on this connection.
URL:https://homecse.iitd.ac.in/event/synthesis-and-arithmetic-of-quantum-circuits/
LOCATION:Bharti 501\, IIT Campus\, Hauz Khas\, New Delhi
CATEGORIES:Seminars
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