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DTSTART:20260101T000000
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DTSTART;TZID=Asia/Kolkata:20260416T100000
DTEND;TZID=Asia/Kolkata:20260416T110000
DTSTAMP:20261010T130607
CREATED:20260415T081035Z
LAST-MODIFIED:20260415T081035Z
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SUMMARY:Challenges in scaling memory bandwidth in modern SoCs by Nithya Bashyam
DESCRIPTION:Venue: Bharti501\nAbstract: Memory bandwidth scaling has emerged as a critical bottleneck as compute capabilities continue to grow faster than DRAM performance. This talk examines why higher memory frequencies do not directly translate to higher delivered bandwidth\, focusing on bandwidth efficiency rather than peak bandwidth. It discusses key constraints arising from DRAM organization\, timing parameters\, power\, reliability and security\, and highlights the roles of memory controllers\, SoC architecture\, and workload behavior. The talk provides a framework to understand the architectural trade‑offs involved in sustaining memory bandwidth scaling in modern SoCs.\n\n\nBiography: A Principal Engineer in Client SoC Performance Architecture at Intel\, Nithya Bashyam holds an M.Tech. in Electronics Design from CEDT\, IISc. He joined Intel in 2004\, initially working on front‑end design for two years\, before moving in 2006 to the CPU SoC Architecture team. He contributed to the industry’s first CPU with integrated graphics and memory controller on Sandy Bridge\, released in 2011\, followed by work on a few generations of server CPUs. Since Skylake (2015)\, he has focused on client CPUs\, working across the core‑to‑memory path including cache\, ring\, memory controllers\, and aspects of the I/O subsystem. He has led memory subsystem performance for several generations of client SoCs and led SoC performance for Lunar Lake (2024) and Panther Lake (2025).
URL:https://homecse.iitd.ac.in/event/challenges-in-scaling-memory-bandwidth-in-modern-socs-by-nithya-bashyam/
LOCATION:Bharti 501\, IIT Campus\, Hauz Khas\, New Delhi
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DTSTART;TZID=Asia/Kolkata:20260416T120000
DTEND;TZID=Asia/Kolkata:20260416T130000
DTSTAMP:20261010T130607
CREATED:20260415T080141Z
LAST-MODIFIED:20260415T080141Z
UID:2491-1776340800-1776344400@homecse.iitd.ac.in
SUMMARY:The Landscape of Exact Round Complexity in Secure Multi-Party Computation by Prof. Arpita Patra
DESCRIPTION:Venue: Bharti501\nAbstract: Secure Multi-Party Computation (MPC) is a central problem in cryptography\, often regarded as its holy grail. It enables a group of mutually distrusting data owners to jointly compute a function over their private inputs\, while revealing nothing beyond what is inherently implied by the output itself.\nRound complexity is one of the most fundamental efficiency measures in MPC\, capturing the minimal interaction required for secure computation. In this talk\, I will present a high-level overview of the evolution of research on round complexity in MPC and place my own contributions within this evolving landscape.\n\nBio: Arpita Patra is a Professor of Computer Science at the Indian Institute of Science (IISc). Her research focuses on cryptography\, with particular emphasis on the theoretical foundations and practical implementations of secure computation protocols. She has authored over 100 publications\, and her work has been recognized through numerous honors\, including the Prof. S. K. Chatterjee Award for Outstanding Woman Researcher/Industry Leader (IISc\, 2023)\, the Google Privacy Research Faculty Award (2023)\, the J.P. Morgan Chase Faculty Award (2022)\, the SONY Faculty Innovation Award (2021)\, the Google Research Award (2020)\, the NASI Young Scientist Platinum Jubilee Award (2018)\, the SERB Women Excellence Award (2016)\, and the INAE Young Engineer Award (2016). She is affiliated with leading scientific academies\, including the Indian Academy of Sciences (IAS)\, the Indian National Academy of Engineering (INAE)\, and The World Academy of Sciences (TWAS). She has coauthored two academic textbooks: Secure Multiparty Computation against Passive Adversaries (Springer\, 2023) and Fault Tolerant Distributed Consensus in Synchronous Networks (Springer\, 2025).
URL:https://homecse.iitd.ac.in/event/the-landscape-of-exact-round-complexity-in-secure-multi-party-computation-by-prof-arpita-patra/
LOCATION:Bharti 501\, IIT Campus\, Hauz Khas\, New Delhi
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