The group has interests in Hardware-software co-design, Embedded systems design, Reconfigurable computing, Fault-tolerant computing, Hardware implementations, Temperature-aware architectures, Energy-efficient architectures, Design-for-debug, Cache memory, 3D and non-volatile memory, Architectural extensions for mobile security, Architectures for machine learning, Architectures for computer vision, Secure architectures.
Publications
Low-power mapping of behavioral arrays to multiple memories Proceedings Article
In: Mark Horowitz, Jan M. Rabaey, Brock Barton, Massoud Pedram (Ed.): Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996, Monterey, California, USA, August 12-14, 1996, pp. 289–292, IEEE, 1996.
Memory Organization for Improved Data Cache Performance in Embedded Processors Proceedings Article
In: Proceedings of the 9th International Symposium on System Synthesis, ISSS '96, San Diego, CA, USA, November 6-8, 1996, pp. 90–95, ACM / IEEE Computer Society, 1996.
1995 high level synthesis design repository Proceedings Article
In: Pierre G. Paulin, Farhad Mavaddat (Ed.): Proceedings of the 8th International Symposium on System Synthesis (ISSS 1995), September 13-15, 1995, Cannes, France, pp. 170–174, ACM, 1995.
Estimating the Complexity of Synthesized Designs from FSM Specifications Journal Article
In: IEEE Des. Test Comput., vol. 10, no. 1, pp. 30–35, 1993.
Estimating the Complexity of Synthesized Designs from FSM Specifications Proceedings Article
In: Proceedings of the Fifth International Conference on VLSI Design, VLSI Design 1992, Bangalore, India, January 4-7, 1992, pp. 175–180, IEEE Computer Society, 1992.
Members
