The group has interests in Hardware-software co-design, Embedded systems design, Reconfigurable computing, Fault-tolerant computing, Hardware implementations, Temperature-aware architectures, Energy-efficient architectures, Design-for-debug, Cache memory, 3D and non-volatile memory, Architectural extensions for mobile security, Architectures for machine learning, Architectures for computer vision, Secure architectures.
Publications
Improving cache Performance Through Tiling and Data Alignment Proceedings Article
In: Gianfranco Bilardi, Afonso Ferreira, Reinhard Lüling, José D. P. Rolim (Ed.): Solving Irregularly Structured Problems in Parallel, 4th International Symposium, IRREGULAR '97, Paderborn, Germany, June 12-13, 1997, Proceedings, pp. 167–185, Springer, 1997.
Exploiting off-chip memory access modes in high-level synthesis Proceedings Article
In: Ralph H. J. M. Otten, Hiroto Yasuura (Ed.): Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1997, San Jose, CA, USA, November 9-13, 1997, pp. 333–340, IEEE Computer Society / ACM, 1997.
Efficient utilization of scratch-pad memory in embedded processor applications Proceedings Article
In: European Design and Test Conference, ED&TC '97, Paris, France, 17-20 March 1997, pp. 7–11, IEEE Computer Society, 1997.
Memory data organization for improved cache performance in embedded processor applications Journal Article
In: ACM Trans. Design Autom. Electr. Syst., vol. 2, no. 4, pp. 384–409, 1997.
Reducing Address Bus Transitions for Low Power Memory Mapping Proceedings Article
In: 1996 European Design and Test Conference, ED&TC 1996, Paris, France, March 11-14, 1996, pp. 63–71, IEEE Computer Society, 1996.
Members
