The group has interests in Hardware-software co-design, Embedded systems design, Reconfigurable computing, Fault-tolerant computing, Hardware implementations, Temperature-aware architectures, Energy-efficient architectures, Design-for-debug, Cache memory, 3D and non-volatile memory, Architectural extensions for mobile security, Architectures for machine learning, Architectures for computer vision, Secure architectures.
Publications
Incorporating DRAM access modes into high-level synthesis Journal Article
In: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., vol. 17, no. 2, pp. 96–109, 1998.
Data Cache Sizing for Embedded Processor Applications Proceedings Article
In: Patrick M. Dewilde, Franz J. Rammig, Gerry Musgrave (Ed.): 1998 Design, Automation and Test in Europe (DATE '98), February 23-26, 1998, Le Palais des Congrès de Paris, Paris, France, pp. 925–926, IEEE Computer Society, 1998.
A Data Alignment Technique for Improving Cache Performance Proceedings Article
In: Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, ICCD '97, Austin, Texas, USA, October 12-15, 1997, pp. 587–592, IEEE Computer Society, 1997.
Behavioral Array Mapping into Multiport Memories Targeting Low Power Proceedings Article
In: 10th International Conference on VLSI Design (VLSI Design 1997), 4-7 January 1997, Hyderabad, India, pp. 268–273, IEEE Computer Society, 1997.
Architectural Exploration and Optimization of Local Memory in Embedded Systems Proceedings Article
In: Frank Vahid, Francky Catthoor (Ed.): Proceedings of the 10th International Symposium on System Synthesis, ISSS '97, Antwerp, Belgium, September 17-19, 1997, pp. 90, ACM / IEEE Computer Society, 1997.
Members
